TSMC

TSMC sits at the apex of the supply chain that makes AI deployment physically possible. Every Nvidia H100, H200, and Blackwell AI accelerator is manufactured at a TSMC Taiwan fab; every AMD MI300X; every Google TPU. TSMC's foundry capacity allocation is therefore a binding constraint on how fast hyperscalers can expand AI infrastructure, and how fast AI can be deployed at the scale required to produce the workforce displacement effects that companies like Alphabet, Microsoft, and Salesforce are reporting. When Alphabet CEO Sundar Pichai said on the Q1 2026 earnings call that Google was 'compute constrained', foundry capacity was one of the two physical limiters, alongside HBM memory supply from SK Hynix and Samsung.

TSMC's pricing power in AI accelerator production is substantial. As the sole high-volume manufacturer at advanced logic nodes (3nm, 2nm), it can command premium wafer prices from hyperscalers who have no credible alternative at the required performance level. Those pricing decisions flow directly into the unit economics of AI deployment: higher foundry cost per chip raises the threshold at which it is economically rational for a company to substitute AI for human labour in a given workflow.

For the AI jobs and power story, TSMC is the most upstream critical PATH item. The $460 billion backlog that Alphabet disclosed, and the equivalent figures at Amazon, Microsoft, and Meta, all resolve ultimately to TSMC capacity commitments on a 2-3 year fab construction timeline.

TSMC (Taiwan Semiconductor Manufacturing Company) is the world's largest contract chipmaker, founded in 1987 and headquartered in Hsinchu, Taiwan. It is the sole high-volume manufacturer of advanced logic chips at 3nm and below, producing processors for Nvidia, AMD, Apple, Google, and the global defence industrial base. TSMC's Dresden fab, built via the ESMC joint venture with Infineon, NXP, and Bosch, is Europe's most significant step towards domestic leading-edge semiconductor capacity.

TSMC's Dresden footprint is central to Europe's chip sovereignty ambition. The ESMC joint venture (TSMC with Infineon, NXP, and Bosch) broke ground in 2024 with an expected €10 billion investment and support from the EU Chips Act. In June 2026, TSMC confirmed that DUV lithography equipment has been shipped from Taiwan to the Dresden site, with the ESMC line locked to a 2027 production schedule. This marks the transition from construction to equipment installation: the critical PATH now runs through tool qualification and process bring-up rather than civil works.

The EU's overall chip share stands at 9% against a 20% target set by the European Chips Act, a gap the June 2026 European Commission scorecard confirmed has not closed. Dresden is currently the only advancing leading-edge project on the continent; its 2027 timeline makes it the earliest credible contributor to closing that gap.