TSMC

TSMC sits at the apex of the supply chain that makes AI deployment physically possible. Every Nvidia H100, H200, and Blackwell AI accelerator is manufactured at a TSMC Taiwan fab; every AMD MI300X; every Google TPU. TSMC's foundry capacity allocation is therefore a binding constraint on how fast hyperscalers can expand AI infrastructure — and how fast AI can be deployed at the scale required to produce the workforce displacement effects that companies like Alphabet, Microsoft, and Salesforce are reporting. When Alphabet CEO Sundar Pichai said on the Q1 2026 earnings call that Google was 'compute constrained', foundry capacity was one of the two physical limiters, alongside HBM memory supply from SK Hynix and Samsung.

TSMC's pricing power in AI accelerator production is substantial. As the sole high-volume manufacturer at advanced logic nodes (3nm, 2nm), it can command premium wafer prices from hyperscalers who have no credible alternative at the required performance level. Those pricing decisions flow directly into the unit economics of AI deployment: higher foundry cost per chip raises the threshold at which it is economically rational for a company to substitute AI for human labour in a given workflow.

For the AI jobs and power story, TSMC is the most upstream critical PATH item. The $460 billion backlog that Alphabet disclosed, and the equivalent figures at Amazon, Microsoft, and Meta, all resolve ultimately to TSMC capacity commitments on a 2-3 year fab construction timeline.